Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits
نویسندگان
چکیده
منابع مشابه
Application of an SOI
Systems-on-chips (SoCs) that combine digital and high-speed communication circuits present new opportunities for powersaving designs. This results from both the large number of system specifications that can be traded off to minimize overall power and the inherent low capacitance of densely integrated devices. As shown in this paper, aggressively scaled silicon-oninsulator (SOI) CMOS is a promi...
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